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RFIC Layout Engineer

Apple

Job Description

Summary

Posted: Jul 3, 2024

Role Number:200557679

Would you like to join Apple's growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. In this role, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex SoC products.

Description

As a RF layout engineer, you will be responsible for - Detailed transistor-level layout of RF and analog circuit blocks including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO. - Block level and top-level layout through full verification flow including extraction, DRC, LVS, and DFM checking - Co-work with designers on block level and top-level floorplanning - Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling - Top-level layout integration and verification, schedule management
  • BS and 3+ years of relevant industry experience.


Preferred Qualifications

  • Experience in custom RF/analog layout for radio transceivers with extensive knowledge of deep sub-micron CMOS (16nm and lower with FinFet experience as a must)
  • Knowledgeable in layout techniques for device matching, minimizing parasitics, RF shielding, and high frequency routing
  • Solid understanding of RC delay, electromigration, and coupling
  • Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, etc.
  • High level proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. in FinFet Technology
  • Extensive knowledge of CADENCE layout tools
  • Excellent communication skills and able to work with cross-functional teams
  • Capability to lead other layout engineers for top-level integration
  • Ability to recognize failure prone circuit and layout structures and proactively work with circuit designers for the best approach to resolve problems
  • Scripting skills in PERL or SKILL are a plus, but not required.


Pay & Benefits

    At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,600 and $236,300, and your base pay will depend on your skills, qualifications, experience, and location.

    Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

    Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.



More

  • Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

 

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